Silicon Labs /EFR32FG23A010F512GM48 /MSC_S /READCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as READCTRL

31282724232019161512118743000000000000000000000000000000000000000000 (WS0)MODE

MODE=WS0

Description

No Description

Fields

MODE

Read Mode

0 (WS0): Zero wait-states inserted in fetch or read transfers

1 (WS1): One wait-state inserted for each fetch or read transfer. See Flash Wait-States table for details

2 (WS2): Two wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details

3 (WS3): Three wait-states inserted for eatch fetch or read transfer. See Flash Wait-States table for details

Links

()